The following statements relate to the technical field of integrated circuits having a resistance-based or resistively switching memory, and to a method for operating resistively switching memory.
As possible alternatives to common semiconductor memories such as DRAM, SRAM, or FLASH, resistance-based or resistive or resistively switching memory devices, in particular phase change memories (PCM), are known. In the case of phase change memories, a “active” or else “switching active” material or a phase change medium, respectively, is positioned between two electrodes (e.g., an anode and a cathode), e.g., a material with an appropriate chalcogenide compound (e.g., a Ge—Sb—Te or Ag—In—Sb—Te compound) that is capable of resistive switchability.
Such resistance-based memory technologies are used in the case of PCRAM (phase change random access memory) or CBRAM (conductive bridging random access memory). The exact functioning of such technologies will be explained in more detail in the following. In the case of other resistance-based memory technologies, the physical structure of the memory cell may be different vis-á-vis a CBRAM memory cell or a PCRAM memory cell, but the principle of writing, deleting, and reading of the cell content is similar in all cases.
In a phase change memory cell (PCRAM), the phase change material may be placed in an amorphous, relatively weakly conductive, or a crystalline, relatively strongly conductive, state by using appropriate switching processes. To cause, with a resistively switching phase memory cell, a change from an amorphous state with a relatively weak electric conductivity to a crystalline state with a relatively good electric conductivity of the switching-active material, an appropriate current pulse or voltage pulse, respectively, with a programming voltage may be applied to the electrodes, which results in that the switching-active material is heated beyond the crystallization temperature and crystallizes (programming process or writing process or SET process).
Vice versa, a change of state of the switching-active phase change material from a crystalline, i.e. relatively strong conductive state, to an amorphous, i.e. relatively weak conductive state, may be achieved by using an appropriate current pulse or voltage pulse, respectively, with a deleting voltage, the switching-active material is heated beyond the melting temperature and is subsequently quenched to an amorphous state by quick cooling (deleting process or RESET process).
The functioning of phase change memories is consequently based on the amorphous-crystalline phase transition of a phase change material, wherein the two states of a phase change memory cell, namely the amorphous, high-resistance state or the crystalline, low-resistance state, respectively, together represent one bit, i.e. a logic “1” or a logic “0”. Thereby, the effect is utilized that the two phases of these compounds distinctly differ in their electric conductivity, and that the state of the phase change memory cell can thus be recognized again or be read out, respectively. The reading of the memory content may be performed by applying a voltage below the programming voltage and the deleting voltage, so that the data content of the memory cell is not changed.
The programming (programming process or writing process or SET process) of a memory cell being in the amorphous, high-resistance state to the low-resistance, crystalline phase is performed in that the material of the phase change memory is heated beyond the crystallization temperature and thus crystallized by using an electric heating pulse. The reverse process, i.e. the deleting process or RESET process, is realized in that the material is heated beyond the melting point of the phase change material by using a stronger heating pulse, i.e. with a higher energy introduction than with the write process or SET process, and that the amorphous, high-resistance state in the memory cell is recovered by the deleting voltage applied to the memory cell. Subsequently, the memory cell is quenched by a quick cooling in this amorphous, high-resistance state. The reading out of the data content of a PCRAM memory cell is usually performed by the applying of an electric voltage below the voltages that are necessary for achieving the crystallization or for melting the phase change material, so as not to change the data content.
In the case of CBRAM memory cells, an electrically conductive path can be generated by a positive voltage in an otherwise high-resistance material, wherein the memory cell assumes a low-resistance state. The programming process is reversible and can be reversed again in a deleting process with reverse polarity with negative voltage, so that it is possible to switch back and forth between a low-resistance and a high-resistance memory state of the memory cell. The physical processes related therewith will only occur from particular threshold voltages on, so that voltages below these threshold values may be used for reading the cell information. These processes for programming and deleting a CBRAM memory cell will be explained in more detail below by FIG. 1.
With such resistance-based memory technologies it is consequently possible to store information in a resistive memory cell by an electric resistance value. A particular, e.g., positive, threshold voltage is applied to the memory cell for writing the cell information, and a particular, e.g., negative, threshold voltage for deleting the cell information. For reading out the cell information, a lower read voltage is applied to the memory cell, wherein the current Iread through the cell resulting from the applied read voltage is substantially smaller than the programming current Iset and the deleting current Ireset. This may also be represented by the following relation equations:Iread<Iset andIread<Ireset 
In the case of conventional CBRAM memory cells, it was consequently necessary for the read voltage to keep a sufficient distance to the two threshold voltages (programming or deleting voltage) for reading out the cell information so as not to change the cell information during the read process. Typically, a conventional CBRAM memory cell has switch-on voltages of approx. 240 mV and switch-off voltages of approx. −80 mV. From this, there usually results a maximum read voltage of:
240 mV (threshold voltage)
−100 mV (safety difference)
=140 mV (maximum read voltage)
Thus, only short bit lines are possible with conventional CBRAM memory cells, and the low read voltage has to be amplified, which results in a higher switching effort with slower signal development and requires an own read voltage. Furthermore, a reading out of the data content from the CBRAM memory cell is practically not possible with a negative read voltage, since the threshold voltage for deleting the memory cell may be, for instance, only approx. −80 mV and this adds to approximately Zero with the safety difference of 100 mV. With a read voltage in the range of 0 mV, however, it is not possible to reliably determine data contents from the memory cell.
For these and other reasons, there is a need for the present invention.